Publications

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. DNNGuard: An Elastic Heterogeneous Architecture for DNN Accelerator against Adversarial Attacks. Proceedings of the 25th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-25), 2020.

. Capturing and Obscuring Ping Pong Patterns to Mitigate Continuous Attacks. Proceedings of the Conference on Design, Automation & Test in Europe (DATE), 2020.

. SNA: A Siamese Network Accelerator to Exploit the Model Level Parallelism of Hybrid Network Structures. Proceedings of the Conference on Design, Automation & Test in Europe Pages(DATE), 2020.

. NPUFort: A Secure Architecture of DNN Accelerator Against Model Inversion Attack. Proceedings of the 2019 ACM International Conference on Computing Frontier, 2019.

. CacheGuard: A Security-Enhanced Directory Architecture Against Continuous Attacks. Proceedings of the 2019 ACM International Conference on Computing Frontier, 2019.

. Venice: An Effective Resource Sharing Architecture for Data Center Servers. ACM Transactions on Computer Systems(TOCS), 2019.

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. Conditional Speculation: An Effective Approach to Safeguard Out-of-Order Execution Against Spectre Attacks. IEEE International Symposium on High Performance Computer Architecture (HPCA-25), 2019.

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. 松耦合数据中心架构远程数据访问加速机制研究. 全国体系结构年会(ACA 2018)会议最佳论文奖, 2018.

. 基于硬件的代码复用攻击防御机制综述. 高技术通讯,vol. 28, no. 4, pp. 299-312, 2018.

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. RAGuard: An efficient and user-transparent hardware mechanism against ROP attacks. ACM Transactions on Architecture and Code Optimization (TACO), 2018.

. Stateful Forward-Edge CFI Enforcement with Intel MPX. 全国体系结构年会(ACA 2018), CCIS 908, pp. 1–16, 2018. (EI), 2018.

. Security-first Architecture: Deploying Physically Isolated Active Security Processors for Safeguarding the Future of Computing. Cybersecur 1(2), 2018.

DOI

. RAGuard: A Hardware Based Mechanism for Backward-Edge Control-Flow Integrity. Proceedings of the ACM International Conference on Computing Frontiers, 2017.

. Venice: Exploring Server Architectures for Effective Resource Sharing. Proceedings of the 22nd International Symposium on High-Performance Computer Architecture (HPCA-22), 2016.

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. Using Remote Memory in Data Center with PCIe Fabric. Efficient Data Center Server workshop, held in conjunction with the 19th International Symposium on High-Performance Computer Architecture (HPCA-19), 2013.

. Cost Effective Data Center Server. Proceedings of the 19th International Symposium on High-Performance Computer Architecture (HPCA-19), 2013.

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. Cross-node Virtual Machine Communication Acceleration. ACM International Conference on Computing Frontiers, 2013.

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. Micro-architectural Characterization of Desktop Cloud Workloads. IEEE International Symposium on Workload Characterization (IISWC), 2012.

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. Application-driven Energy-efficient Architecture Explorations for Big Data. First Workshop on Architectures and Systems for Big Data (ASBD 2011), co-held with Held in conjunction with the Twentieth International Conference on Parallel Architectures and Compilation Techniques(PACT), 2011.

. Efficient data streaming with on-chip accelerators: Opportunities and challenges. Proceedings of the 17th International Symposium on High-Performance Computer Architecture (HPCA-17), 2011.

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. Optimization of Stateful Hardware Acceleration in Hybrid Architectures. Design, Automation and Test in Europe (DATE), 2011.

. Frequent Instruction Sequential Pattern Mining in Hardware Sample Data. IEEE International Conference on Data Mining (ICDM), 2010.

. Compiler and Runtime Techniques for Software Transactional Memory Optimization. Concurr. Comput. : Practice and Experience, 2009.

. Hardware Transactional Memory System for Parallel Programming. IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC), 2008.

. Accelerating Sequential Programs On Chip Multiprocessors Via Dynamic Prefetching Thread. Microprocessor and Microsystem, Elsevier publishing, 2007.

. High Performance General-Purpose Microprocessors: Past and Future. Journal of Computer Science & Technology, 2006.

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. A Memory Bandwidth Effective Cache Store Miss Policy. Asia-Pacific Computer Systems Architecture Conference 2005: 750-760, 2005.